Download Analog Integrated Circuit Design by David Johns Ken Martin PDF

By David Johns Ken Martin

ISBN-10: 0471144487

ISBN-13: 9780471144489

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3V Fig. 29 Typical plat of I c versus VCE for a BJT. region when the collector bias voltage is increased. To illustrate this point, a typical plot of the collector current, Ic, as a function of collector-to-emitter voltage, VCE, for different values of Is is shown in Fig. 29 for a practical transistor. The fact that the curves are not flat for VCE > VCE-sa! indicates the dependence of I c on VCEo Indeed, to a good approximation, the dependence is linear with a slope that intercepts the VCE axis at V CE = -VA for all values of Is.

The condition required for conduction is now V SG > Vip. where Vtp is now a negative quantity for an enhancement p-channel transistor. 11 The requirement on the source-drain voltage for a p-channel transistor to be in the active region is Vso> VSG + V,p' The equations for ro, in both regions, remain unchanged, because all voltage variables are squared, resulting in positive hole current flow from the source to the drain in p-channel transistors. For n-channel depletion transistors, the only difference is that V'd < 0 V.

25 n' Effective base region p" A cress section of an npn bipolar-junction transistor. '. "&~,,~, n' w Fig . 26 A simplified structure of an npn transistor. 44 Chapter 1 • Integrated-Cireuit Devices and Modelling Emitter Collector Ie = ~IB ~It '" 100Is (Typical) Emitter Ie = ~Is '" 201s (Typical if lateral) ~Ic Collector (b) pnp (a) npn Fig. 27 The symbols representing [o] an npn bipolor-junction transistor and pnp bipolar-junction transistor. (bl a region, W, is small (typically, less than I 11m).

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